1. Field of the Invention
The present invention relates to modulation and encoding of signals. More specifically, the present invention relates to a method for choosing coding schemes, mappings, and puncturing rates for system which uses modulation and encoding.
2. The Prior Art
Referring first to FIG. 1, a communication system having a digital signal transmission and receiving system is illustrated. A transmission portion of the digital signal transmission and receiving system includes an encoder 10, a puncturing module 12, and a modulator 14 providing a modulated signal at a communication channel 16. Similarly, a receiving portion of the digital signal transmission and receiving system includes a demodulator 18, a depuncturing module 20, and a decoder 22.
The encoder 10 may be a convolutional encoder. Convolutional codes typically include redundant symbols to increase the signal to noise ratio. In this manner, the probability of errors introduced during encoding is minimized. Standard convolutional coding techniques often increase required bandwidth. However, some of the coded bits may be systematically removed in favorable channel conditions through a process called "puncturing".
The puncturing module 12 provides punctured data to the modulator 14. Prior to digital signal transmission, puncturing is typically used to remove redundancy in a codeword. In this manner, symbols are systematically deleted or "punctured". Puncturing may be performed at various rates with respect to the basic unpunctured code. For example, a punctured code rate (or "puncturing rate") of 3/4 in a system with a basic rate 1/2 encoder is achieved where 2 symbols out of every 3 symbol pairs coming out of the encoder are systematically deleted. FIG. 2 depicts this type of puncturing rate. Through the use of puncturing, throughput is substantially increased.
The modulated signal includes an in-phase component and a quadrature component. When the modulated signal is received, after conversion from an analog to a digital signal, each bit is demodulated into the in-phase and quadrature signal components by the demodulator 18 using sine and cosine functions.
Various types of errors may occur in this demodulation step. One of the most common types of errors is a phase rotation, sometimes known as a phase ambiguity or geometric errors. During demodulation, a certain phase is "locked" by a lock detection mechanism. For Quadrature phase shift keyed (QPSK) systems, this lock detection mechanism, however, oftentimes has trouble distinguishing between a phase position of .theta. and 90.degree. j+0 (where j=2,3, or 3). For example, a lock detection mechanism may accidentally lock in a phase of 90 degrees instead of 0 degrees. Thus, every sequence that comes out of the demodulator would be out of phase by 90 degrees. A similar problem occurs in 8-PSK systems, where lock detection mechanisms have trouble distinguishing between a phase position of .theta. and 45.degree. j+0 (where j=1 . . . 7).
Referring again to FIG. 1, the decoder 26 may comprise a Viterbi decoder, which may be used to decode these convolutional codes. Before the Viterbi decoder handles the sequence, however, it checks to see if the sequence is a valid one. If the sequence is invalid, the Viterbi decoder will not be able to decode the sequence at all. To prevent this from occurring, a pre-Viterbi compensation block 20 can be used along with a synchronization block 24 before the Viterbi decoder is encountered. The pre-Viterbi compensation block 20 basically modifies the sequence, then the synchronization block 24 checks to see if the sequence is synchronized. If not, feedback from the synchronization block 24 to the pre-Viterbi compensation block 20 causes the pre-Viterbi compensation block 20 to modify the sequence again, this time in a different fashion. Eventually, by trying all the possible phases, the correct "synchronized" one will be encountered, at which point the Viterbi decoder 24 can proceed with the decoding process. Because of the multiple iterations required to "synchronize" the input to the Viterbi decoder 24, however, the synchronization step takes a long time.
What is needed is a method which would speed up this synchronization step while still maintaining accuracy.